1. Field of the Invention
Embodiments of the present invention generally relate to methods and apparatus for indirectly planarizing a substrate. More specifically, embodiments of the present invention generally relate to methods and apparatus for indirectly planarizing a substrate in a semiconductor substrate test system.
2. Description of the Related Art
Testing and/or burning in of semiconductor substrates having completed or partially completed devices formed thereon is an important part of the fabrication sequence for creating semiconductor devices (such as integrated circuits). Test systems developed to test and/or burn in these devices are generally expensive and are designed to test devices on substrates in standard sizes, such as 200 or 300 millimeter semiconductor wafers. Moreover, conventional test systems generally have a limited physical space for respective components of the system due to the space limitation within the fabrication/testing facility as well as within the physical footprint of the test system itself. For example, a component of the test system, such as a probe card for contacting the device under test (DUT) must fit within an assigned area in order to not interfere with other components of the system or their functionality, accessibility, and the like. Accordingly, test systems designed for testing one size substrate may not be able to test larger substrates due to the larger substrate not fitting in the test system, and/or due to the test system being unable to test locations of the larger substrate that lie outside of the test area of the system.
As substrates continue increasing in size to improve yields and push down fabrication costs for producing integrated circuits, existing test systems will more frequently run into physical limitations in their design that do not allow these conventional systems to test a particular wafer.
Therefore, there is a need for a method and apparatus for expanding the range over which a probe card may be utilized in a test system.